Japanese Patent Application No. 2001-28648, filed Feb. 5, 2001, is hereby incorporated by reference in its entirety.
The present invention relates to a comparator circuit that determines whether a difference between two voltages is greater or smaller than a set value (i.e., a window voltage comparator), and more particularly to a window voltage comparator that is suitable for circuit integration.
A general structure of a conventional window voltage comparator is shown in FIG. 3. The window voltage comparator includes a first instrumentation amplifier 31 that receives a first input voltage VA and a second input voltage VB and outputs a voltage in proportion to a difference thereof, a second instrumentation amplifier 32 that receives a first window voltage VW1 and a second window voltage VW2 and outputs a voltage in proportion to a difference thereof, and a comparator 33 that compares output voltages of the first instrumentation amplifier 31 and the second instrumentation amplifier 32 and generates an output VOUT corresponding to a result of the comparison.
The gain G of each of the instrumentation amplifiers 31 and 32 can be set, for example, at one time. However, it is difficult to realize the instrumentation amplifiers 31 and 32 in an IC, which performs an operation with an accurate gain in response to a wide range of input voltages. Also, the operation speed of a window voltage comparator is determined by a response speed of the instrumentation amplifiers 31 and 32. An ordinary instrumentation amplifier has a response frequency that is at most in the order of several kHz, and therefore is short of performance when an operation at frequencies on the order of MHz is desired.
It is noted that Japanese Patent Application Laid-open No. 62-269512 describes a high precision and high-speed voltage comparator that reduces influences of the offset voltage of a differential amplifier by using gate capacitance of MOS transistors and switches, without using a capacitance element that has no voltage dependency. However, this voltage comparator determines whether one input voltage is greater or smaller than one reference voltage, but it cannot make a determination based on four types of voltages as to whether a difference between two input voltages is greater or smaller than a set value that is determined by a difference between two reference voltages.
Also, Japanese Patent Application Laid-open No. 1-91373 describes a variable window comparator that adjusts the shifted position of a circuit part by a structure in which only the relative position of a window comparator with respect to the voltage axis can be shifted, while the upper and the lower reference voltages for the window comparator are maintained constant. However, this variable window comparator determines whether one input voltage is greater or smaller than two reference voltages, but it cannot make a determination based on four types of voltages as to whether a difference between two input voltages is greater or smaller than a set value that is determined by a difference between two reference voltages.
In view of the above, the present invention may provide a circuit structure that achieves a high speed operation and is suitable for circuit integration in a window voltage comparator that determines whether a difference between two voltages is greater or smaller than a set value.
To solve the problems described above, a comparator circuit in accordance with a first aspect of the present invention comprises:
a first differential pair including a first transistor having a gate to which a first input voltage is applied and a second transistor having a gate to which a second input voltage is applied;
a second differential pair including a third transistor having a gate to which a first reference voltage is applied and a fourth transistor having a gate to which a second reference voltage is applied; and
a comparison circuit that compares the sum of drain currents of at least the first and fourth transistors and the sum of drain currents of at least the second and third transistors and thereby determines whether a difference between the first input voltage and the second input voltage is greater or smaller than a difference between the first reference voltage and the second reference voltage.
Also, a comparator circuit in accordance with a second aspect of the present invention comprises:
a first N-channel transistor differential pair including a first N-channel transistor having a gate to which a first input voltage is applied and a second N-channel transistor having a gate to which a second input voltage is applied;
a first P-channel transistor differential pair including a first P-channel transistor having a gate to which the second input voltage is applied and a second P-channel transistor having a gate to which the first input voltage is applied;
a first current mixing circuit that obtains the sum of drain currents of the first N-channel transistor and the first P-channel transistor;
a second current mixing circuit that obtains the sum of drain currents of the second N-channel transistor and the second P-channel transistor;
a second N-channel transistor differential pair including a third N-channel transistor having a gate to which a first reference voltage is applied and a fourth N-channel transistor having a gate to which a second reference voltage is applied;
a second P-channel transistor differential pair including a third P-channel transistor having a gate to which the second reference voltage is applied and a fourth P-channel transistor having a gate to which the first reference voltage is applied;
a third current mixing circuit that obtains the sum of drain currents of the third N-channel transistor and the third P-channel transistor;
a fourth current mixing circuit that obtains the sum of drain currents of the fourth N-channel transistor and the fourth P-channel transistor; and
a comparison circuit that compares the sum of output currents of the first and fourth current mixing circuits and the sum of output currents of the second and third current mixing circuits and thereby determines whether a difference between the first input voltage and the second input voltage is greater or smaller than a difference between the first reference voltage and the second reference voltage.
Here, the comparator circuit may further comprises a control circuit that controls a total gain of the first N-channel transistor differential pair and the first P-channel transistor differential pair by controlling a potential difference between a source potential of the first and second P-channel transistors and a source potential of the first and second N-channel transistors according to voltages of first and second input signals.
In the above, the comparison circuit may be formed of a folded-cascode amplifier circuit including two input transistors that receive a common gate potential and have sources connected to outputs of the all differential pairs.
By the structure described above, a difference of two input voltages is compared with a difference of two reference voltages, such that a determination can be made as to whether the difference of the two input voltages is greater or smaller than a set value. Also, since a transistor differential pair has a fast response speed, and is suitable for integration of circuits, a high speed window voltage comparator can be realized in a semiconductor integrated circuit.